Unlike proprietary architectures, RISC-V's open standard allows for rapid innovation and customization, free from the licensing constraints that have long limited new entrants in the CPU market.

ECARX Holdings Inc., a global mobility tech provider, introduced its EXP01 processor, based on the open-source RISC-V architecture, at the RISC-V Summit Europe 2025 in Paris.

Buterin's suggestion, which he posted on Ethereum's primary developer forum, involves replacing the Ethereum Virtual Machine, the software engine that powers programs on the network, with RISC-V ...

The processor, called RV32-WUJI, has 6000 transistors, operates at KHz speeds and can execute the full RISC-V 32-bit instruction set. We’ve identified a wide range of what are termed 2D materials.

On Wednesday, a team of researchers from China used a paper published in Nature to describe a 32-bit RISC-V processor built using molybdenum disulfide instead of silicon as the semiconductor. For ...

Alibaba's DAMO Academy has introduced its first server-grade RISC-V processor, the C930, designed for high-performance computing (HPC) applications. Announced at the XuanTie RISC-V Ecosystem ...

China plans to issue guidance to encourage the use of open-source RISC-V chips nationwide for the first time, two sources briefed on the matter said, as Beijing accelerates efforts to curb the ...

RISC-V, an open instruction set architecture (ISA), is reshaping the global computing landscape. Unlike proprietary ISAs such as x86, widely used by Intel and AMD, or ARM, which dominates mobile ...

RISC-V architecture has become the center of China's strategy to reduce reliance on US chip imports and strengthen its domestic semiconductor industry. With government backing, the Chinese Academy ...

As RISC-V gains popularity, organizations that adopt the architecture can stand out by launching products with unique, cost-effective, and efficient processors.

Abstract: We present an approach to teach RISC processor design for an undergraduate computer architecture course specifically aimed to reduce the gap between a high-level datapath block diagram and a ...