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IEEE2d
Encoder implementation with fpga for non-binary LDPC codes
Low-complexity encoders for non-binary low-density parity-check (LDPC) codes with code rate of 1/3 are implemented with Field Programmable Gate Arrays. In this design, the locations of non-zero ...
IEEE4d
High-Throughput Low-Latency Encoder and Decoder for a Class of Generalized Reed–Solomon Codes for Short-Reach Optical Communications - IEEE Xplore
Published in: IEEE Transactions on Circuits and Systems II: Express Briefs ( Volume: 67 , Issue: 4 , April 2020 ) ...