As the first commercial IP provider with memory compiler and logic library IP in use on TSMC’s 40nm process, Virage Logic offers customers early access to design more competitive chips at reduced ...

“The availability of DesignWare Logic Library and Embedded Memory IP on the Mie Fujitsu Semiconductor 40LP process enables our mutual customers to reduce design risk,” said Masahiro Chijiiwa, director ...

Designers using the Mie Fujitsu Semiconductor 40LP process can integrate DesignWare Logic Library and Embedded Memory IP to optimize the power efficiency and performance of their designs.