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Abstract: This paper describes a 14nm test chip employing a novel NAND/NOR readout chain for characterizing soft error rate (SER) in combinational logic gates. The ...
Abstract: Phase transition Material (PTM) assisted logic and SRAM bitcells have been proposed with improved soft error tolerance. The large insulating resistance of ...
It also generates the language wrappers for Java and Python, and builds the native interface DLLs too (in Java and Python solution configurations respectively). The Java JAR is built separately with ...
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