The majority logic (ML) gate (MLG) is required in fast decoder implementations to protect memories from transient soft errors. In this paper, a novel MLG design is proposed; it consists of a pMOS pull ...

We propose non-latching gates based on Superconducting QUantum Interference Device (SQUID) and logic circuits based on it. The gate consists of a 3-junction-SQUID coupled with an RF-SQUID inductively.