The picture, which we'll reproduce below, seems to have been taken during an AMD presentation, and it clearly shows a diagram of the Navi 31 GPU, which is the biggest RDNA 3 graphics processor ...

Looking at the diagram, we see the CPU serving up 24 PCIe 4.0 lanes, with 16 of them jettisoned to two PCIe x16 slots for graphics cards. Those slots can be configured as either PCIe 4.0 x16 or x8/x8.

During last week's presentation, some had hopes for PCIe Gen 5.0 connectivity. However, the presentation and slides did not mention a thing about the version used. A newly leaked block diagram ...