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Mehdi, I. et al. Terahertz multiplier circuits in 2006 IEEE MTT-S International Microwave Symposium Digest 341–344 (IEEE, San Fransisco, California, 2006). Google Scholar Maestrini, A. et al.
A Wallace tree multiplier using Booth Recoder is proposed in this paper. It is an improved version of tree based Wallace tree multiplier architecture. This paper aims at additional reduction of ...
Dual rail adiabatic circuit design offers hardware-level protection against side-channel power analysis attacks such as Differential Power Analysis (DPA) and Correlation Power Analysis (CPA) attacks.