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IEEE9h
A 4-GS/s 11.3-mW 7-bit Time-Based ADC With Folding Voltage-to-Time Converter and Pipelined TDC in 65-nm CMOS - IEEE Xplore
A folding voltage-to-time converter (VTC) is proposed for low-power time-based (TB) flash ADCs performing voltage-to-time-to-digital conversion. Conventional VTCs in TB flash ADCs generate multiple ...
IEEE6d
Implementation of Carry Save Adder Using Novel Eighteen Transistor Hybrid Full Adder - IEEE Xplore
A novel 1-bit hybrid full adder circuit is implemented using eighteen transistors. Simulations are done using the Cadence Virtuoso Schematic Editor in 180 and 90 nm technologies. The performances are ...