A new technical paper titled “Embedding security into ferroelectric FET array via in situ memory operation” was published by researchers at Pennsylvania State University, University of Notre Dame, ...

“We demonstrate the first hardware implementation of an oscillatory neural network (ONN) utilizing resistive memory (ReRAM) for coupling elements. A ReRAM crossbar array chip, integrated into the Back ...

Violin's new 6000 series of all-Flash memory arrays was designed to replace traditional tier-one storage arrays, said Don Basile, CEO of the Mountain View, Calif.-based vendor. "For a tier-one ...

The densest silicon memory chip yet, a prototype device with a MEMS silicon platform that moves beneath an array of nanoscale-size read/write tips, has achieved a density of 1 Tbit/in.2 That's 20 ...