News
Figure 2 A pseudorandom sequence produces this eye diagram as measured at the output of a TLK2201B serializer that an FPGA-sequence generator drives.
Passing a wire through the core sets the corresponding bit to a logic 1, else 0 ... Luckily, it’s possible to code a Fibonacci sequence generator in that space, including driving the output ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results