TABLE 1 is a cost comparison between typical 1-million-gate design 0.13mm process for FPGA, Structured ASIC and cell-based ASIC implementations. ... PCIX, SSTL2 class I/II, CMOS, and TTL I/O with ...

Due to the advantages mentioned above a VLSI based approach was considered for implementation of an 802.11a Baseband. Following sections describe the VLSI based implementation in details. Design ...