With the two diodes reversed and a 910 Ohm resistor removed, a NOR gate is created. The next step was to build a S-R latch using the NAND gates and inverters, which holds some basic memory.

The layout was designed by using an open source ... The complete layout of the decoder was designed based on its schematic circuit, which consists of NOT gates, 2-input NAND gates, 3-input NAND ...