Clocking constitutes one of the most important aspects of any block or SoC level design ... the clock dividers must be configurable. This article illustrates the various implementations of ...

In the Microchip tinyAVR {0,1,2}-series we see Configurable Custom Logic (CCL) among the Core Independent Peripherals (CIP) available on the chip. In this YouTube video [Grug Huhler] shows us how ...

This article describes a design of a simple digital device able to connect two Ethernet MACs with configurable point ... and Control Logic Collision/Carrier Sense Control Logic. Figure 1: RevMII block ...

Outfitted with a new Core Independent Peripheral (CIP) - the Configurable Logic Block (CLB) module - these new MCUs enable the creation of hardware-based, custom combinational logic functions directly ...

Configurable Custom Logic (CCL) is among one of the powerful CIP peripherals. Think of CCL as a rudimentary CPLD — a programmable logic peripheral, which can be connected to a wide range of ...

Based upon ST's Structured Processor Enhanced Architecture (SPEAr), the device reportedly integrates an ARM core with a full set of IP (intellectual property) blocks and a configurable logic block ...

It is called the CLB (configurable logic block) and it based on an earlier simpler Microchip peripheral called the CLC (configurable logic cell). “Building on over a decade of experience with the CLC, ...

About Leopard Logic and the Gladiator CLD Family Leopard Logic is a fabless semiconductor company that has pioneered Gladiator CLD, a new class of configurable logic devices that combine FPGA and ASIC ...

The new SPEAr Head (part number SPEAr-09-H020) integrates an advanced ARM926EJ-S core running at 266MHz, a complete set of IP (intellectual property) blocks and a configurable logic block that allows ...