[RetroBytes] nicely presents the curious history of the SPARC processor architecture. SPARC, short for Scalable Processor Architecture, defined some of the most commercially successful RISC ...

That said, the diagram is at the very least a plausible design. Looking at the diagram, we see the CPU serving up 24 PCIe 4.0 lanes, with 16 of them jettisoned to two PCIe x16 slots for graphics ...